Veloce is a hardware emulation system that is one of the cornerstones of Mentor A Siemens Business' entire functional verification platform for complex systems-on-chip (SoC). The system has a scalable architecture and can handle test objects of up to 15 billion vents, making it a clear leader among similar systems from other vendors.

The Veloce architecture is based on a proprietary, specialized ASIC (Crystal), which is reprogrammed to compile the RTL code of the object under test, taking into account the interconnections on a single block (board) and between blocks to exchange data between ASIC chips.

A dedicated operating system manages the entire verification environment, which also includes dedicated applications and hardware and software solutions for connecting physical and virtual peripheral devices. As a result, the user gets a flexible, customizable system that allows solving the task of functional verification of SoC of almost unlimited volume at a speed several orders of magnitude faster than traditional simulation, while ensuring full observability of all internal and external logical signals of the tested object for efficient debugging process.

The Veloce operating system provides flexible resource management during emulation, which allows you to add new testing options while working with a single object under test, including, for example, testing SoC firmware simultaneously with hardware testing. Additionally, the operating system allows Veloce to be used in multi-user mode, supporting simultaneous launch of multiple emulation sessions of unrelated test objects.

Key features and benefits

• Use of a dedicated programmable ASIC and scalable hardware architecture enables emulation of projects ranging from 40 million to 15 billion gates
• Emulation of individual blocks, modules and the entire SoC under test at speeds several orders of magnitude faster than simulation
• The ability to run a giant volume of test vectors in a short time, including the real embedded software, allows to detect complex "hidden" errors, which are extremely difficult to detect by traditional verification methods. This makes it possible to exclude re-runs of the project implementation in silicon when errors are detected at the late stages of testing, for example, in the conditions of laboratory prototyping
• Comprehensive and flexible debugging environment, close in its parameters to the simulation debugging environment
• Support for assertion mechanism and coverage completeness analysis, similar to software modeling
• Support for multi-user mode through a standard user queue management mechanism, including servicing requests in remote mode
• Specially written applications for Veloce solve the full range of functional verification tasks for today's most complex SoC projects.