IC Test & Diagnostics

Tessent TestKompress

Tessent TestKompress delivers maximum deterministic test quality at minimum test cost. The solution uses a patented on-chip compression algorithm to create test patte sets that significantly reduce test time and the volume of data loaded into the chip by test equipment.

  • Comprehensive fault coverage with minimal patte count
  • Industry-leading compression ratios (100:1 and beyond)
  • Full support for at-speed testing and small delay defect detection

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